In peripheral line trunk groups of a digital telephone switching system, a protocol-oriented communication must be guaranteed between the processors that control a line trunk group.
FIG. 1 shows a physical connection structure between a group processor GP that controls an entire line trunk group LTG and a plurality of module processors MP that control various modules of a line trunk group. The group processor transmits and receives messages in the form of message blocks to or from various module processors via a message distribution system SMX according to a fixed pulse frame structure in time-division multiplex. An interface module SMXI serves as an interface between a module processor and the message distribution system. A working clock CKS is connected to the group processor GP and to the message distribution system SMX. A respective processor clock CKP is connected to each of the processor modules MP.